Copyright DSPtronics 2020
sys2go Signa-X1 Rapid Idea Development System
XC3S250/500E Spartan-3E Xilinx FPGA
Powerful and flexible DSP Processing Power
Available in 2 versions: 250,000 and 500,000 Gates
10,476 Logic Cells
360K Block RAM Bits
73K Distributed RAM Bits
20 embedded 18x18 DSP multipliers
4 Digital Clock Managers
Available in 2 versions: 250,000 and 500,000 Gates
10,476 Logic Cells
360K Block RAM Bits
73K Distributed RAM Bits
20 embedded 18x18 DSP multipliers
4 Digital Clock Managers
Mixed Signal System
Embedded A/D and D/A converter
From 8 KHz up to 96 kHz sampling rate
24-bit A/D resolution
Dual channel for Stereo Sound processing
Headphone Amplifier for direct headphone connection
4 extra analog buffers for custom Sigma-Delta ADC and PWM DAC implementation
From 8 KHz up to 96 kHz sampling rate
24-bit A/D resolution
Dual channel for Stereo Sound processing
Headphone Amplifier for direct headphone connection
4 extra analog buffers for custom Sigma-Delta ADC and PWM DAC implementation
480 Mbps High Speed bit rate
Dual functionality:
- Used to configure the FPGA
- Used to stream data in and out
Dual functionality:
- Used to configure the FPGA
- Used to stream data in and out
USB 2.0 Communication
